Conventionally, a technique (referred to as redundancy technique) of replacing a defective column with a redundancy column is widely used in the NAND flash memory. Therefore, the defective column can be repaired.
However, as a result of the use of the redundancy technique, a data write speed is degraded as increasing size of one page that is a unit in which the data is collectively written. For example, the problem is disclosed in Jpn. Pat. Appln. KOKAI Publication No. 6-12892. This is attributed to the fact that, because the redundancy column is usually provided at an end of the page, movement of the data is required in a page buffer when the data is transferred to the page buffer. Further, occasionally a circuit block that controls the replacement of the defective column with the redundancy column is enlarged to increase a chip size.